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Role of Wafer Thickness in Performance of Silicon Heterojunction Solar Cells
O. Astakhov, T. Merdzhanova, D. Weigand, L. Wolf, A. Gad, K. Ding, U. Rau
Silicon Materials and Cells
Subtopic: Low Temperature Route for Si Cells
Event: 37th European Photovoltaic Solar Energy Conference and Exhibition
Session: 2DV.3.39
ISBN: 3-936338-73-6
0,00 EUR
Document(s): poster


Cost reduction in the dominant PV branch of crystalline Si is closely related to reduction of the Si wafer thickness W below the current industrial standard of approx. 170 μm. However techno-economic progress with thickness reduction is expected only for Si technologies providing very high degree of interface passivation [1]. This is due to the increasing role of interface-related recombination as wafers go thinner. Several detailed theoretical studies predict that Si cells with ideally passivated interfaces will have the highest efficiency limit at W=110 μm [2, 3] and even at W = 78.7 μm [4]. Among main technological routes of crystalline Si cells the silicon heterojunction (SHJ) technology seems to be the closest to “ideally passivated” interfaces. Therefore SHJ is the most relevant technology to study how close the performance of real solar cells can follow the theoretical predictions and identify the factors limiting efficiency of experimental cells. Natural optical loss related to the reduction of wafer thickness is expected to be compensated by increase in Voc and FF due to the increase in excess carrier density. For SHJ solar cells based on high quality wafer, further increase in carrier injection implies a qualitative transition from the Schockley-Read-Hall to Auger recombination limited current-voltage (JV) characteristics. The transition is detected with differential (local) ideality factor of 2/3 in the vicinity of Voc and is a reason for extraordinary high predictions of FF over 89%.